Program
DIMES'26 will take place in Room Kepler at Clarion Congress Hotel Prague.
The proceedings will become available in the ACM Digital Library soon.
Schedule
08:30 am – Welcome & Session I: Memory Tiering: Policies & Management
(Chair: TBD)
- Regional Policies for Memory Tiering Systems
Hayden Coffey (University of Wisconsin-Madison); Sujay Yadalam (The University of Texas at Austin); Ashwin Poduval, Vinay Banakar, Shivaram Venkataraman, Michael Swift (University of Wisconsin-Madison) - PHASE: A Platform for Hardware and Software Evaluation of Memory Tiering
Dikla Tzafrir, Shaurya Patel (University of British Columbia); Joel Nider (University of British Columbia and UnifabriX); Alexandra (Sasha) Fedorova (University of British Columbia and MongoDB) - TierSizer: Counterfactual Reasoning for DRAM Sizing in Tiered Memory Systems
Sujay Yadalam, Saarth Deshpande, Divyanshu Saxena, Venkat Arun, Neeraja Yadwadkar, Aditya Akella (The University of Texas at Austin)
10:00 am – Coffee Break
10:30 am – Session II: Expanding the Memory Hierarchy
(Chair: TBD)
- To Tier, or Not? Evaluating Tiered Memory Systems on the Basis of Cost
Ashwin Poduval (University of Wisconsin-Madison); Sujay Yadalam (UT Austin); Michael Swift (University of Wisconsin-Madison) - RDMA vs. SSD Swap: A Preliminary Study through the Lens of Application Performance
Yuben Yang (University of Sydney); Baptiste Lepers (Inria); Willy Zwaenepoel (University of Sydney) - The Kernel’s Write: Application Read-Only Memory
Hui Sub Shim, Katherine Mohr (Stanford University); Philip Levis (Stanford University and Google)
12:00 pm – Lunch Break
1:30 pm – Session III: Heterogeneous & Shared Memory Systems
(Chair: TBD)
- Analysis of shared memory between CPUs and GPUs
Silvia R. Alcaraz, Sven Hepkema, Vasilis Mageirakos, Jonas Dann, Gustavo Alonso (ETH Zürich) - hDAGs: A Directed Acyclic Graph Representation for Scheduling Tasks on Heterogeneous Hardware
Marcel Lütke Dreimann, Birte Friesel, Lilith Lenze, Olaf Spinczyk (Universität Osnabrück) - Shadix: A Distributed Message Broker Leveraging Shared Disaggregated CXL Memory
Julian Hackenberg, Lukas Hagen, Marcel Weisgut, Florian Schmeller, Tilmann Rabl (Hasso Plattner Institute, University of Potsdam)
3:00 pm – Coffee Break
3:30 pm – Session IV: Programming Interfaces for Memory Systems
(Chair: TBD)
- McZero: Memory-Controller–Supported Page Zeroing with LPDDR6 Metadata
Alexander Halbuer, Illia Ostapyshyn (Leibniz Universität Hannover); Nils Wilbert, Derek Christ (University of Würzburg); Matthias Jung (Universität Würzburg and Fraunhofer IESE); Daniel Lohmann (Leibniz Universität Hannover) - Hints for Program-Driven Control of Hybrid Volatile/Non-Volatile Caches
Stefan Meißner, Stefan Wildermann, Neele Peter (Friedrich-Alexander-Universität Erlangen-Nürnberg); Nils Wilbert (University of Würzburg); Jürgen Teich (Friedrich-Alexander-Universität Erlangen-Nürnberg) - Speeding up FaaS Warm Starts with Memory Restoration Templates
Aravinda Prasad, Sreenivas Subramoney, Sandeep Kumar, Antti Kervinen (Intel)
5:00 pm – Closing Remarks