Program

DIMES'25 will take place in Room Pearl at Lotte Hotel World Seoul.

The DIMES'25 proceedings are available at the ACM Digital Library

Schedule

09:00 am — Welcome & Keynotes

9:10 am — Keynote 1: Case for Disruptive Data Movement for (Non)-Disruptive Memory Systems

John Kim (KAIST)

Disruptive memory systems have been widely investigated as potential technology of the future but, in some cases, always remain the technology of the future. This talk explores the potential role of computer architecture in enabling memory system innovation. In particular, John discusses 3D-stacked memory as a disruptive technology that has both failed and succeeded, highlighting how system architecture can enable adoption. He also examines processing-in-memory (PIM) as a comparable case of potential and challenge.

9:55 am -- Keynote 2: Unlocking the Memory-Centric Computing system through CXL-based Processing-near-Memory module: CMM-DC

Hokyoon Lee (Samsung)

The increasing demand for memory-intensive applications has driven industries into innovative memory sub-system architecture. Especially, the combination of the CXL interconnect and Processing-near-Memory (PNM) is a promising solution that aims to overcome data transfer overhead by enabling CXL Memory Module with compute capability. This talk will describe the CXL-PNM architecture in detail, covering use cases and performance. Furthermore, CXL-PNM enabled compute system will be highlighted along with challenges that the industry is currently facing.

11:15 am — Session II: Taming the Memory Jungle
(Chair: TBA)

Striking the Right Chord: Parameter Tuning in Memory Tiering Systems
Konstantinos Kanellis, Sujay Yadalam, Shivaram Venkataraman, Michael Swift (University of Wisconsin–Madison)
Closing the Benchmark Gap for Tiered Memory
Rajath Shashidhara (University of Washington & Google), Simon Peter (University of Washington), Scott Hare, Kimberly Keeton (Google)
ScalePool: Hybrid XLink–CXL Fabric for Composable Resource Disaggregation in Unified Scale-up Domains
Hyein Woo, Miryeong Kwon, Jiseon Kim, Eunjee Na, Hanjin Choi, Seonghyeon Jang (Panmnesia), Myoungsoo Jung (Panmnesia & KAIST)

12:45 pm — Lunch Break

02:15 pm — Session III: Hot Data, Cool Tricks
(Chair: TBA)

Keynote 3: Keynote: New Opportunities in the Memory-Centric AI Computing Era

Woosuk Chung (SK Hynix)

The rapid growth of AI data demands a shift beyond processor-centric computing. This keynote introduces memory-centric AI computing and SK Hynix’s next-generation memory and storage technologies, designed to deliver greater efficiency and scalability for AI workloads.

Tidying Up the Address Space
Vinay Banakar (University of Wisconsin-Madison, Google), Suli Yang (Google), Kan Wu (xAI), Andrea Arpaci-Dusseau, Remzi Arpaci-Dusseau (University of Wisconsin–Madison), Kimberly Keeton (Google)
Shinano: A Heterogeneous Application-Specific TLB Architecture for Streaming Accelerators
Luhao Liu (The University of Tokyo), Maximilian Jakob Heer (ETH Zurich), Takahiro Shinagawa (The University of Tokyo), Gustavo Alonso (ETH Zurich)

03:45 pm — Coffee Break

04:15 pm — Session IV: Beyond the Hierarchy
(Chair: Jörg Nolte)

To Stride or Not to Stride the Memory Access?
Lennart Schmidt (TU Dresden), Roland Kühn, Matti Krause, Jens Teubner (TU Dortmund), Wolfgang Lehner, Dirk Habich (TU Dresden)
Transparent DAX Mappings: Towards Automatic Kernel Bypass with CXL-Based Hybrid SSDs
Yussuf Khalil (Samsung, KIT), Daniel Habicht, Pascal Ellinger, Frank Bellosa (KIT), Javier González, Adam Manzanares, Vivek Shah (Samsung)
Towards Memory Specialization: A Case for Long-Term and Short-Term RAM
Peijing Li, Muhammad Shahir Abdurrahman, Rachel Cleaveland, Philip Levis, Caroline Trippel, Thierry Tambe, H.-S. Philip Wong (Stanford), Sergey Legtchenko, Ioan Stefanovici (Microsoft Research), David Tennenhouse (NSF)

05:45 pm — Closing Remarks

Keynote Speakers

Case for Disruptive Data Movement for (Non)-Disruptive Memory Systems

John Kim (KAIST)

John Kim is a full professor in the School of Electrical Engineering at KAIST (Korea Advanced Institute of Science and Technology) in Daejeon, Korea. John Kim received his Ph.D. from Stanford University and B.S/M.Eng from Cornell University. His research interests include computer architecture, interconnection networks, security, and accelerators & PIM. He has received a Google Faculty Research Award and Microsoft-Asia New Faculty Fellowship/. He is listed in the Hall of Fame for ISCA, MICRO, and HPCA and is an IEEE Fellow.

Unlocking the Memory-Centric Computing system through CXL-based Processing-near-Memory module: CMM-DC

Hokyoon Lee (Samsung)

Hokyoon Lee is a principal engineer in Memory Architecture Group at Samsung. He is responsible for designing the CXL-PNM HW/SW architecture. He has a diverse background spanning software to memory devices, with expertise in the areas of compilers, computer architectures, and memory subsystem. He received his B.S., and Ph.D. degrees in Electronics and Electrical Engineering from Korea University in 2006 and 2015, and holds over 20 patents in the areas of memory systems and technology.

New Opportunities in the Memory-Centric AI Computing Era

Woosuk Chung (SK Hynix)

Woosuk Chung is the Vice President and Head of the Software Solutions Group at SK Hynix. He has over 20 years of experience in research and development for system software solutions and has been with SK Hynix for over 10 years.

At SK Hynix, he has been on pioneering new memory and storage solutions. To achieve this, he explores emerging technology trends, identifies challenges in current systems, and develops solutions using innovative memory and storage technologies.